[dmd-concurrency] real

[Andrei Alexandrescu]

Robert Jacques wrote:
> On Fri, 29 Jan 2010 11:06:11 -0500, Andrei Alexandrescu 
> <andrei at erdani.com> wrote:
> 
>> Steve Schveighoffer wrote:
>>> But on a 64 bit machine you will not.  Arrays are 128 bit items on 64
>>> bit machines.  There are not 128-bit atomic operations on a 64 bit
>>> machine.
>>
>> There are on some, which is exactly what makes the decision difficult 
>> :o/. The rest of your assessment is correct.
>>
>> Andrei
> 
> Actually, atomic read/write is supported for aligned 128-bit values (via 
> SSE2). It's just that some CPUs don't support unaligned atomic 128-bit 
> reads.

CMPXCHG16B works on Intel-64 and late-model AMD, but not on earlier 
AMDs. It does not require special alignment and can be used to emulate 
straight assignment.

http://en.wikipedia.org/wiki/X86-64

"Early AMD64 processors lacked the CMPXCHG16B instruction, which is an 
extension of the CMPXCHG8B instruction present on most post-486 
processors. Similar to CMPXCHG8B, CMPXCHG16B allows for atomic 
operations on 128-bit double quadword (or oword) data types. This is 
useful for parallel algorithms that use compare and swap on data larger 
than the size of a pointer, common in lock-free and wait-free 
algorithms. Without CMPXCHG16B one must use workarounds, such as a 
critical section or alternative lock-free approaches."

Just to restate what I think after having given the matter more thought, 
I think it would be an unmitigated disaster and a shame if we allowed 
atomic shared array assignments on some machines but not other.


Andrei